- support@husseinkey.com
- livechat
Texas Instruments SN74HC165/SN74HC165-Q1 8-Bit Parallel-Load Shift Registers are registers that shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HC165/SN74HC165-Q1 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (QH) output.
Clocking is accomplished by a low-to-high clock (CLK) input transition while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. When SH/LD is held high, parallel loading is inhibited. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs. The Texas Instruments SN74HC165-Q1 devices are AEC-Q100 qualified for automotive applications.
