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Texas Instruments CD74HC73/CD74HCT73 Dual J-K Flip-Flops

Texas Instruments CD74HC73/CD74HCT73 Dual J-K Flip-Flops utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. These devices exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

The Texas Instruments CD74HC73/CD74HCT73 flip-flops have independent J, K, Reset and Clock inputs, and Q and Q outputs. These devices change state on the negative-going transition of the clock pulse. Reset is accomplished asynchronously by a low-level input. This device is functionally identical to the HC/HCT107 but differs in the terminal assignment and some parametric limits. The HCT logic family is functionally and pin-compatible with the standard LS logic family.

Features

Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times
Asynchronous reset
Complementary outputs
Buffered inputs
Typical f_MAX = 60MHz at V_CC = 5V, C_L = 15pF, T_A = 25°C
Fanout (over-temperature range)
- Standard outputs: 10 LSTTL loads
- Bus driver outputs: 15 LSTTL loads
–55°C to 125°C wide operating temperature range
Balanced propagation delay and transition times

Significant power reduction compared to LSTTL Logic ICs
HC types
- 2V to 6V operation
- High noise immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT types
- 4.5V to 5.5V operation
- Direct LSTTL input logic compatibility, V_IL = 0.8V (max), V_IH = 2V (min)
- CMOS input compatibility, I_I ≤ 1µA at V_OL, V_OH

Texas Instruments CD74HC73/CD74HCT73 Dual J-K Flip-Flops

Features

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