NXP Semiconductors PF5030 Fail-Safe System Basis Chip PMICs

NXP Semiconductor PF5030 Fail-Safe System Basis Chip PMICs with multiple switch-mode power supplies (SMPSs) and low-dropout regulators (LDOs) are designed for S32Z2/E2 processors. A maximum input voltage of up to 5.25V makes the PF5030 PMICs ideal for working with NXP front system supply families (FS86, FS6x) or any other front supply in the automotive drive train market. Built-in One-Time Programmable (OTP) memory stores key start-up configurations that drastically reduce external components typically used to set external regulators’ output voltage and sequence. Regulator parameters are adjustable through the I2C after start-up, offering flexibility for different system states.

Features

  • Voltage
    • 5.25VDC maximum operating voltage
    • Supports operating voltage range down to 3.3V
    • Low power OFF mode with low sleep current (15µA typical)
  • Power supplies
    • BUCK1/2 low voltage integrated synchronous buck converter
      • Configurable output voltage from 0.7V to 1.5V and current capability up to 3.5ADC
      • Capable of multiphase operation up to 7.0ADC
    • BUCK3 low voltage integrated synchronous buck converter
      • Configurable output voltage from 1.0V to 4.1V and current capability up to 2.5ADC
    • LDO1/2 low voltage LDO regulator for MCU I/O and system peripheral
      • Configurable output voltage from 1.1V to 4.1V and current capability up to 400mADC
  • System support
    • 1x input pin for power-ON detection, 1.8V, 3.3V, and 5.0V compatible
    • Analog multiplexer with full system voltages and temperature monitoring
    • Enhanced leader/follower power-up sequencing management through XFAILB pin
    • 10ms optional RSTB release delay during power-up for certain MCU compliance
    • Device control via 32-bit I2C interface with 8-bit CRC
  • Compliance
    • EMC optimization techniques on switching regulators, including spread spectrum and manual frequency tuning
    • EMI robustness supporting various automotive EMI test standards
    • IEC 61967-4 conducted emission
    • IEC 62132-4 conducted immunity
  • Functional safety
    • ASIL D capability on safety goal 1 (SG1/CSG_01) on UV/OV for all S32Z2/E2 power rails (0.8V, 1.1V, 1.8V, and 3.3V)
    • Configurable ASIL from QM to ASIL D on safety goal 2 (SG2/CSG_02) on MCU monitoring function (watchdog)
    • Independent voltage monitoring circuitry
    • Up to 6x voltage monitoring inputs with 1.0% target accuracy
    • Logical and analog built-in self-test (LBIST/ABIST)
    • Safety outputs with latent fault detection mechanism (PGOOD, RSTB, FS0B)
  • Configuration and enablement
    • 40-pin QFN with exposed pad for optimized thermal management
    • OTP programming for device customization

Applications

  • EV propulsion and power train domain controllers
  • Chassis-integrated systems
  • S32Z2/E2 companion chips

Simplified Application

Application Circuit Diagram - NXP Semiconductors PF5030 Fail-Safe System Basis Chip PMICs

Block Diagram

Block Diagram - NXP Semiconductors PF5030 Fail-Safe System Basis Chip PMICs

NXP Semiconductors PF5030 Fail-Safe System Basis Chip PMICs