Analog Devices ADAU1797 Quad ADCs combine four high-performance analog-to-digital converters (ADCs) with direct-coupled inputs capable of 10Vrms. The ADAU1797 implements multibit sigma-delta (Σ-Δ) architecture with a continuous time front end for low EMI. The devices can be directly connected to the electret microphone (ECM) and produce the bias for powering the microphone.
The ADI ADAU1797 Quad ADCs use only a single 3.3V supply. The part internally generates the microphone bias voltage. The microphone bias is programmable in a few steps from 5V to 9V. The low-power architecture reduces the power consumption. An on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with a frame clock, the PLL eliminates the requirement for a separate high-frequency master clock.
The ADAU1977 is housed in a 40-lead LFCSP package.
Associated Eval Board