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Texas Instruments CDCDB400 4-Output Clock Buffer

Texas Instruments CDCDB400 4-Output Clock Buffer is an LP-HCSL, DB800ZL-compliant clock buffer capable of distributing the reference clock for PCIe Gen 1-5, QuickPath Interconnect (QPI) and UPI, SAS. It can also distribute for SATA interfaces in CC, SRNS, or SRIS architectures. The SMBus interface and four output enable pins to allow the configuration and control of all four outputs individually. The CDCDB400 is a DB800ZL derivative buffer and meets or exceeds the system parameters in the DB800ZL specification. The device also meets or exceeds the parameters in the DB2000Q specification. The Texas Instruments CDCDB400 is packaged in a 5mm × 5mm, 32-pin VQFN package.

Features

  • Four LP-HCSL outputs with programmable integrated 85Ω (default) or 100Ω differential output terminations
  • Four hardware output-enable (OE#) controls
  • Additive phase jitter after PCIE Gen5 filter: < 25fs, RMS (maximum)
  • Additive phase jitter after DB2000Q filter: < 38fs, RMS (maximum)
  • Supports PCIe Gen 4 and Gen 5 Common Clock (CC) and Individual Reference (IR) architectures
    • Spread spectrum-compatible
  • Output-to-output skew: < 50ps
  • Input-to-output delay: < 3ns
  • Fail-safe input
  • Programmable output slew rate control
  • Three selectable SMBus addresses
  • 3.3V core and IO supply voltages
  • Hardware-controlled low power mode (PD#)
  • Current consumption: 46mA maximum
  • 5mm × 5mm, 32-pin VQFN package

Applications

  • Microserver and tower server
  • Storage area network and host bus adapter card
  • Network-attached storage
  • Hardware accelerator
  • Rack server
  • Communications switch
  • Computer on module
  • CT and PET scanners
  • Rugged PC laptop

Functional Block Diagram

Block Diagram - Texas Instruments CDCDB400 4-Output Clock Buffer

Texas Instruments CDCDB400 4-Output Clock Buffer