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Texas Instruments LMK5B33216 Network Synchronizer & Jitter Cleaner

Texas Instruments LMK5B33216 Network Synchronizer and Jitter Cleaner are designed to meet the stringent requirements of ethernet-based networking applications with < 5ns timing accuracy (class D). The network synchronizer integrates three DPLLs to provide hitless switching. It also has jitter attenuation, programmable loop bandwidth, and no external loop filters. This feature maximizes flexibility and ease of use. Each DPLL phase locks a paired APLL to a reference input. The APLL3 features an ultra-high-performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology. It can generate 312.5MHz output clocks with 42fs typical/60fs maximum RMS jitter irrespective of the DPLL reference input frequency and jitter characteristics. The APLL2 and APLL1 provide options for a second or third frequency and/or synchronization domain.

Reference validation circuitry monitors the DPLL reference clocks and performs a hitless switch between them upon detecting a switchover event. Zero delay and a phased buildout may be enabled to control the phase relationship from input to output. The device is fully programmable through an I2C or SPI interface. The onboard EEPROM can be used to customize system start-up clocks. The Texas Instruments LMK5B33216 also features factory default ROM profiles as fallback options.

Features

  • Ultra-low jitter BAW VCO-based Ethernet clocks
    • 42fs typical/60fs maximum RMS jitter at 312.5MHz
    • 47fs typical/65fs maximum RMS jitter at 156.25MHz
  • Three high-performance Digital Phase Locked Loops (DPLLs) with paired Analog Phase Locked Loops (APLLs)
    • Programmable DPLL loop bandwidth from 1mHz to 4kHz
    • < 1ppt DCO frequency adjustment step size
  • Two differential or single-ended DPLL inputs
    • 1Hz (1PPS) to 800MHz input frequency
    • Digital holdover and hitless switching
  • 16 differential outputs with programmable HSDS/LVPECL, LVDS, and HSCL output formats
    • Up to 20 total frequency outputs when configured with 6 LVCMOS frequency outputs
    • 1Hz (1PPS) to 1250MHz output frequency with programmable swing and common mode
    • PCIe Gen 1 to 6 compliant
  • I2C or 3-wire/4-wire SPI interface

Applications

  • Wired networking
    • Inter/Intra DC interconnect
    • Timing card
    • Line card
    • Fixed card (pizza box)
  • SyncE (G.8262), SONET/SDH (Stratum 3/3E, G.813, GR-1244, GR-253), IEEE 1588 PTP secondary clock
  • Jitter cleaning, wander attenuation, and reference clock generation for 56G/112G PAM-4 SerDes
  • 100G-800G data center switches, core routers, edge routers, WLAN
  • Data center and enterprise computing
    • Smart Network Interface Card (NIC)
  • Optical Transport Networks (OTN G.709)
  • Broadband fixed line access
  • Industrial
    • Test and measurement
    • Medical imaging

System Block Diagram

Block Diagram - Texas Instruments LMK5B33216 Network Synchronizer & Jitter Cleaner

Texas Instruments LMK5B33216 Network Synchronizer & Jitter Cleaner